Avalon-MM-Slave address alignment

Since the Nios can only do 32bit Avalon master cycles, you really don't want a 512bit wide slave.

You'll only get a bus width adapter that will assert the revelant byte enables for the address.

It is probably much better to write a 32bit slave.

I'm not sure what your problem with IORD() and IOWR() is - they are just wrappers that generate ldio and stio instructions.

As such their definitions aren't entirely useful.

Most device driver writers use C structures to map device registers, it is much less error prone than using integer offsets.