Avalon Master write does not write

My sopc modul has 3 Interfaces.

avs_slavereg that holds the registers the nios reads from and writes to to control this modul

avm_readmaster a read only a master that reads data from sdram to feed our ip with data. the addresspointer where this read master reads from is setup by a register inside avs_slavereg

The third interface is the one that makes me more than crazy.

avm_writemaster is the same as the readmaster, but it writes data that are genarated by our ip to sdram. it also has a register inside this sopc modul with the starting address.

the readmaster works perfect.

The Writemaster asserts its avm_writemaster_write with

avm_writemaster_writedata, avm_writemaster_address and avm_writemaster_byteenable set as needed to gain access to sdram.

inside the sopc both masterports have a junction to the sdram.

Our problem is that the writemaster asserts that it wants to write (=1) as we never see a avm_writemaster_waitrequest the avalon switch fabric must have stored this write request inside it. we obay the waitrequest rule.

The write initiated by the writemaster is not always executed. meaning that if the nios2 is in single step / debugging mode the write is more often done and if nios is under free run nearly never.

in other word the more nios has to do, the less writes are executed.

now we are confused.

write is one, address data byteenable is as they should be, waitrequst never occours, inside sopc this master port has a jundtion to sdram but the write is not done ..... so why is the write not performed ?

any idea is greatly welcome.

Michael Schmitt

BTW we use Quartus 5.1 Nios 5.1 all with aktual patches. nios2 is a fast with both caches

http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/wacko.gif