Avalon master and IRQ's

Hi,

I had a similar situation. Workaround was to utilize such a UART where you can use it's interrupt line as an output to the SOPC design, thus combining more than one INT. In the Top Level of your design - you could build some small logic which would cascade these INT lines (whatever No. of INT you have) into one common int line after a simple logic AND (and whatever logic level you need) - out to your DSP.

For reading the statuse (the INT source):

These lines can be routed back to you SOPC Design as inputs to a PIO module (mapped as a register), so you can later read it's content's by the Master, anytime.

Hope that helps..

Haim