Avalon bus with 2 Avalon_MM_ Slaves fails to work (works fine with 1...)

Yes, of course I simulated the dual Slaves with two sets of user signals including the chipselect signal. In all cases only the lower addresses Slave responded with with a chipselect. The purpose of a chipselect is to qualify the Write and Read signals. The statement you are quoting is contradictory in nature, isn't it?

If you have 2 instances of the Slave mapped to diferent address ranges I would expect all associated control signals and in particular the chipselect to respond ONLY to accesses made in these addresses.

There is deffinitly a bug here ! Or else, you have to use only 1 Slave and qualify all its signals with external address decodes if you want to use several Slaves.

Thanks,

Shvitzer