Assignements CFI_Flash

select_n_to_the_cfi_flash FLASH_CEN AA26

tri_state_bridge_address[22..0]

tri_state_bridge_data[15..0]

tri_state_bridge_readn FLASH_OEN AB27

write_n_to_the_cfi_flash FLASH_WEN AA27

Avalon bus don't use tri-state signals inside the FPGA.

The CFI flash must be attached to a tri-state avalon bridge.

The GX chip has the DDR sdram. You should try Nios2 uClinux on GX first.

Use sopc build to creat the chip,

1. nios2 fast core with jtag debug

2. timer

3. jtag uart

4. DDR sdram, you must assign correct pin out to DDR chip.

5. tri-state bridge (dummy)

6. cfi flash (dummy)

save a copy of the ptf with 1-6 for kernel hwselect.

remove 5-6, generate hardware , compile in quartus II to get the sof.

Then you can follow buildroot guide to build kernel zImage and try out.