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Do you have any white paper / application note for generating a single .pof file for both the hardware and software images.
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I had an application note but I can't remember where it is right now. I'd have to search for it.
Try browsing the Altera documentation.
You basically only need the steps I mentioned before:
- generate the hex memory initialization file for your Nios software. I think the Nios tools have an option to generate this hex file in addition to the standard elf file.
- assign the hex file as initialization file for the onchip memory in Qsys/sopc-builder
- rebuild Quartus project and generate pof file
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One more doubt: upon power up, once the hardware and software images are loaded, what is that "thing" which makes the NiosII processor execute the code residing in on-chip memory.
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You must open the Nios properties in sopc/Qsys and set the reset vector to point to onchip ram base address
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