Honored Contributor
Honored Contributor<div class='quotetop'>QUOTE </div>
--- Quote Start --- it needs to do whenever necessary either as a part of the loop or in an interrupt service routine.[/b] --- Quote End --- I am not so clearly understand "a part of the loop" and "an interrupt service routine", since you have witnessed many successful cases in the forum, can you provide me with much more detailed clues? I have browsed many websites and got little information. <div class='quotetop'>QUOTE </div> --- Quote Start --- The most interesting part is the communication between the processors. You can e.g. do FIFOs in hardware or use shared memory protected with a hardware MUTEX (Altera does provide such a Mutex in the Avalon Bus). Of course you can just use a pair of (Fifoed)Uart and connect RxD and TxD.[/b] --- Quote End --- I have viewed shared memory one in much of the material I gathered. But it is the first heard of the FIFO one. Are RxD and TxD the real names of the module? Looking forward to your reply,thank you very much!! :rolleyes:
