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Altera_Forum
Honored Contributor
22 years agoAny example Master Ports available?
Hello, Altera or anyone else have an example demonstrating external master logic driving an SOPC system? I've got one "working" but only if I set a very low fmax. The particulars ar...
Altera_Forum
Honored Contributor
22 years agoHi Kerri,
Jesse sent me example components but no working examples that use a UDL Master Port. I'm still looking at the ip_checksum example however. Is the point that bringing the UDL inside the SOPC system gives it better access to the Avalon bus than working through a UDL Master Port? My case is just like example 13 on page 53 of the Avalon Spec. Mike described it perfectly with Master-drives-Avalon port phrase. Did you get my project? The Master port is the SCAN_IN port. I annotated the bdf to point out the relevent blocks and signals. Thanks, Ken