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Altera_Forum's avatar
Altera_Forum
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21 years ago

ALTERA's SDRAM - Only 2 words bursrt?

Hi All,

I am trying to use the SDR SDRAM controller that is comming with the

NIOS II development package. In the simulation it looks like this core

supports only 2 words bursts. I couldn't find anything in the

documentations.

Am I correct?

If this core supports bigger bursts then 2 words, any ideas what am I

doing wrong?

Thank you all

Zohar

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi Zohar,

    As far as I know, the SDRAM controller which comes with Nios has no burst mode support at all (that is, other value than 0 for bits 0..2 in the mode register), or in other words the burst is fixed at 1. However, reading or writing at/to the same row will not trigger a precharge so you get one read/write per clock. A bit more info you can find in the Nios II Processor Reference Handbook - chapter 5.