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Altera_Forum's avatar
Altera_Forum
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16 years ago

Altera TSE support (EXPERIMENTAL) + GMII ??

Hi all,

I was wondering which interface we must use between the TSE MAC and the PHY when the following option is selected in "make menuconfig" :

[*] altera tripple speed ethernet support (experimental)

When I check the driver files (atse.c and atse.h), I can't find an interface choice like in the other TSE MAC SLS driver...

So which interface must be used :

gmii

rgmii

mii

I must tell that I strongly hope that the GMII will be the good choice :D

Thanks for your help guys !!

Papy

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    fpga = 3c40

    phy = marvell 88e1119

    Ok guys today I can successfully boot uClinux with the TSE MAC (Experimental) selected :

    ---------------------------------------------------------------------

    eth0: atse.c: v1.1, June 3, 2008 by Joseph (Camel) Chen <joe4camel@gmail.com>

    eth0: atse.c: modified version by Eintisy Chuang <eintisy.chuang@gfec.com.tw>

    eth0: Altera Tripple Speed, ether hw addr 00:07:ed:0d:09:19, Marvell 88E1119 PHY

    ---------------------------------------------------------------------

    and make an ifconfig :

    ---------------------------------------------------------------------

    /> ifconfig eth0 192.168.1.122

    ATSE: Waiting on PHY link ......

    eth0 up, link speed 100, full duplex, eth hw addr 00:07:ed:0d:09:19

    ---------------------------------------------------------------------

    but I still can't make a simple ping from or to the board...

    I think that my SOPC system or my Quartus assignements are wrong or maybe I choose the wrong interface between the PHY and the MAC so I post some screenshots :

    sopc system with tse and sgdma

    http://img534.imageshack.us/img534/4321/sopctsesgdma.jpg

    quartus pll to generate clk125 and clk125 (+shift 180°)

    http://img687.imageshack.us/img687/6538/plltsegtxclkclk125.jpg

    quartus rgmii + mdio

    http://img17.imageshack.us/img17/8386/rgmiitse.jpg

    quartus gmii + mdio

    http://img202.imageshack.us/img202/9990/gmiitse.jpg

    Maybe reduce the shift applied to the clk125 ?? But the reference design of the devboard indicated +180° ...

    I must tell that I'm a bit confused about how to solve this issue !

    Thanks !!

    P.S : when I ping the board, I can see the RX and TX led blinking (I don't know if it is important to say it)
  • Altera_Forum's avatar
    Altera_Forum
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    I think I'm using GMII. Can you get it to work with an example design on an evaluation board?

  • Altera_Forum's avatar
    Altera_Forum
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    Actually, I'm not sure about this, ethtool disagrees:

    root:/> ethtool eth0
    Settings for eth0:
            Supported ports: 
            Supported link modes:   10baseT/Half 10baseT/Full
                                    100baseT/Half 100baseT/Full
                                    1000baseT/Half 1000baseT/Full
            Supports auto-negotiation: Yes
            Advertised link modes:  10baseT/Half 10baseT/Full
                                    100baseT/Half 100baseT/Full
                                    1000baseT/Half 1000baseT/Full
            Advertised auto-negotiation: Yes
            Speed: 1000Mb/s
            Duplex: Full
            Port: MII
            PHYAD: 1
            Transceiver: external
            Auto-negotiation: on
            Current message level: 0x00000000 (0)
            Link detected: yes

    Also it only seems to work when actually connected to a gigabit switch. I thought this was because of some debugging I was doing to try to get gigabit to work right, but I took that out and it's still broken.
  • Altera_Forum's avatar
    Altera_Forum
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    you should confirm the interface mode,and make sure the corresponding work timing is correct, and you can test the timing when the ethernet is up by signal tap II! good luck!