Altera TSE on NEEK with web_server_neek demo design

Hi,

I want to get started with Linux on my NEEK Board, and tried the example design from the wiki: http://www.nioswiki.com/linux/creating_a_nios_ii_design_with_an_mmu (The Webserver Example). I'm using quartus 10, since the design was created with quartus 9 I had the SOPC builder update all modules.

Booting works fine, the MAC seems to be recognized, but I can't configure the interface or bring it up.

I already applied the patches Kazuyasu posted at http://www.alteraforum.com/forum/showthread.php?t=18802.

The output while booting, as well as the error are:

Linux/Nios II-MMU
init_bootmem_node(?,0x4cb, 0x0, 0x2000)
free_bootmem(0x4cb000, 0x1b35000)
reserve_bootmem(0x4cb000, 0x400)
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 8128
Kernel command line: 
PID hash table entries: 128 (order: -3, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
We have 8192 pages of RAM
Memory available: 27568k/4905k RAM, 0k/0k ROM (1685k kernel code, 3219k data)
Hierarchical RCU implementation.
        RCU-based detection of stalled CPUs is disabled.
        Verbose stalled-CPUs detection is disabled.
NR_IRQS:32
Calibrating delay loop... 48.84 BogoMIPS (lpj=244224)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
NET: Registered protocol family 16
init_BSP(): registering device resources
bio: create slab <bio-0> at 0
Switching to clocksource timer
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
msgmni has been set to 53
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
ttyJ0 at MMIO 0x8002000 (irq = 10) is a Altera JTAG UART
console  enabled, bootconsole disabled
console  enabled, bootconsole disabled
physmap platform flash device: 01000000 at 04000000
physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Intel/Sharp Extended Query Table at 0x010A
Using buffer write method
Using auto-unlock on power-up/resume
cfi_cmdset_0001: Erase suspend on write enabled
RedBoot partition parsing not available
Using physmap partition information
Creating 4 MTD partitions on "physmap-flash.0":
0x000000d00000-0x000001000000 : "romfs/jffs2"
0x000000000000-0x000000020000 : "catalog"
0x000000180000-0x000000d00000 : "application"
0x000000020000-0x000000180000 : "selector"
Altera TSE MII Bus: probed
Found PHY with ID=0x20005c90 at address=0x1
Altera Triple Speed MAC IP Driver(v8.0) developed by SLS,August-2008
mice: PS/2 mouse device common for all mice
TCP cubic registered
NET: Registered protocol family 17
Freeing unused kernel memory: 2764k freed (0xc01a7000 - 0xc0459000)
Welcome to
          ____ _  _
         /  __| ||_|                 
    _   _| |  | | _ ____  _   _  _  _ 
   | | | | |  | || |  _ \| | | |\ \/ /
   | |_| | |__| || | | | | |_| |/    
   |  ___\____|_||_|_| |_|\____|\_/\_/
   | |
   |_|
 
For further information check:
http://www.uclinux.org/
 
 
 
BusyBox v1.17.2 (2010-10-12 21:17:15 CEST) hush - the humble shell
Enter 'help' for a list of built-in commands.
 
root:/> ifconfig eth0 172.16.0.254 netmask 255.255.0.0 up
PHY 0:12 not found
eth0: Could not attach to PHY
root:/>

At the link to the design it is noted that the TSE in the Design does not work. Is it known why it does not work? I already searched the forum, but I might have missed a discussion for this, if that is so, could someone please point me in the right direction? I'm pretty new to using the NIOS Processor, until now I was only using Microblaze with development Boards from my University, so there might also be a simple error in the hardware design. If it is helpful I could provide you with those files, although I suspect they are nearly the same as those on the wiki.

Regards,

Andreas