Altera TSE driver and example program for lwIP (1.3.2)

Bill

This looks great, but the examples zip file is gone 404

3. Download http://softools.com/download/lwip/lwip_nios_ii_example.zip

test1]$ wget http://softools.com/download/lwip/lwip_nios_ii_example.zip

--2010-06-21 11:40:12-- http://softools.com/download/lwip/lwip_nios_ii_example.zip

Resolving softools.com... 68.180.151.73, 68.180.151.106, 68.180.151.111

Connecting to softools.com|68.180.151.73|:80... connected.

HTTP request sent, awaiting response... 404 Not Found

2010-06-21 11:40:12 ERROR 404: Not Found.

If you have an alternate link it will really help.

The link on the Wiki is correct. Maybe you need to flush your cache or force a page reload on the Wiki? I just tried it on FireFox and IE and all went OK.

Bill

Oh, sorry, i thought you meant the link on the Wiki :mad:

That link is the file you downloaded! If you have the ZIP, you have everything!

The ReadMe has been updated to reflect that it means the file that you downloaded.

Bill

Bill

Thanks, that worked nicely. I just tested it on Stratix IV GX FPGA Development Kit (4sgx230). There are a couple of problems with the instructions

1) in step 18 It asks to delete the "contib" directory from the lwip, where I think we should be deleting the "test" directory. The "contrib" directory does not exist but the "test" directory does and causes build errors.

2) Even though you have mentioned it, but failing to initialize hwaddr[0-5] results in build error (probably intentional)

All said, eclipse does not play well with home-grown SOPC components, whereas create-this-app script works correctly. I will try to integrate it with the script so I can use my components. I can post it here if you don't mind.

Thanks Ira. Is that also under NIOS II 9.x for you? We have not taken the update plunge to 9.x so I couldn't test.

Yes, it's delete test and not contrib from the ZIP. It's the one thing I didn't do since I had 1.3.2 source already. The ZIP is different.

Also, there's a missing "Click Finish" :)

I wanted the errors because there has to be a MAC address to initialize the driver, unless there is a safe "for testing purposes only" MAC we can use.

Thanks for the feedback!

Bill

Hi BillA,

Have you heard from anyone who has had success getting this running standalone on the EP3C120 Development Board with Quartus 9.1 sp2 (under windows)? I have proven by signal tap that the 88e1111 phy is properly communicating with the TSE_Mac (at 100MHz) , and the application generates the following:

"

Running...

INFO : TSE MAC 0 found at address 0x0c000400

INFO : PHY Marvell 88E1111 found at PHY address 0x12 of MAC Group[0]

INFO : PHY[0.0] - Automatically mapped to tse_mac_device[0]

INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link...

INFO : PHY[0.0] - Auto-Negotiation PASSED

INFO : PHY[0.0] - Checking link...

INFO : PHY[0.0] - Link established

INFO : PHY[0.0] - Speed = 100, Duplex = Half

Waiting for link...OK

IP address: 192.168.0.77"

But nothing seems to be received. I place a breakpoint immediately after

if (p == null) return "ethernetif_input" ... in an attempt to capture a packet being processed but never get there.

Any advice would be useful.

thanks very much for posting this example ... it is really appreciated!

Note to previous text ... I am using "Network Packet Generator" to generate Echo Requests, and have validated the correct packetand payload have been receivd and the TSE_Mac statisitcs indicate no error packets and the broadcast packets are corectly being received.

I have tried both the example hardware design available for the board and my own design to no success. No optimisation flags and standard NIOS2. KNown good working DDR2 SDRAM interface design ... running all from same memory.

I suspect maybe something going on with the SGDMA.

Any ideas, or things to try would be much appreciated!

--- Quote Start ---

Note to previous text ... I am using "Network Packet Generator" to generate Echo Requests, and have validated the correct packetand payload have been receivd and the TSE_Mac statisitcs indicate no error packets and the broadcast packets are corectly being received.

I have tried both the example hardware design available for the board and my own design to no success. No optimisation flags and standard NIOS2. KNown good working DDR2 SDRAM interface design ... running all from same memory.

--- Quote End ---

So... if you run a standard NIOS II Ethernet demo (like simple socket server) from the IDE it won't receive Ethernet packets? If true this would be either SGDMA (as you say below) or the MAC interface within the rest of the design. Be sure to review sample Ethernet designs because the bridging is required. The PHY is clearly working as seen in the debug output.

--- Quote Start ---

I suspect maybe something going on with the SGDMA.

--- Quote End ---

Perhaps. If you can get an example to run, then it lets us know it's this lwIP demo not working. Obviously if a NIOS II demo won't run neither will this lwIP demo.

Oh, I forgot this. Does the following link provide anything useful to you?

http://www.alteraforum.com/forum/showthread.php?t=1575

Bill