Altera FPGA EP4CE55F23C7N

Question

I currently working on an Altera FPGA. In this project, we were given only the soft software source code using Nios II Software Build Tools for Eclipse I like to run and build the original code before making any changes to it. However, only a .pof programming file and a .cdf file was given to us, so when setting the Hardware design setup, please correct me if I’m wrong, I need the SOPC file and .sof file to configure the hardware?. I tried using the .pof or .cdf files in some way but with no success. Is there a way I can compile and build this application somehow using the .pof file or other way and thus be able to create a bsp project and load the .elf file to the FPGA. Or do I need this .sopcinfo and .sof files. Thank you.

farabi · Answer

Hello,

You may want to refer to this document : https://cdrdv2.intel.com/v1/dl/getContent/666887?fileName=n2cpu-nii5v1gen2-683836-666887.pdf

and design example for you to quickly test the hw you have:
https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/horizontal/exm-hardware-tutorial.html

tutorial inside the design example: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an717.pdf

regards,
Farabi

farabi · Answer

Hello,

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

regards,
Farabi

Forum Discussion

Altera FPGA EP4CE55F23C7N

2 Replies

Recent Discussions

NIOS SDK SBOM/FOSS info

Correct way to use mSGDMA with a NIOSV/m processor on a MAX10 FPGA

Nios-V on Cyclone IV

Unable to load Ashling Riscfree NiosV libraries

University Program IP for NiosV