Adding avalon interface to cust-instruction logic

Hi Folks,

I have a design requirement wherein, I need to design a multi cycle custom instruction, that would be accessing memory directly each clock cycle.

I want the interface to memory as generic as possible, independent of the memory type.

My idea for this was to add a avalon master interface to the custom instruction's exported signals. I don't know if this is a feasible idea at all.

I found some help on adding avalon interfaces to custom components, but I couldn&#39;t find enough material that answered my questions. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif

Any pointers to similar work or any new ideas about how this can be accomplished would be greatly appreciated.

Many thanks,

--Sunil