agieson_cl
New Contributor
New ContributorAccessing qspi with a NIOS V application on a C10GX
Hi! When attempting to read and write to a qspi chip on my C10GX board, writes do not seem to be working properly (assuming the reads are working properly). I am using the Generic QUAD SPI Controlle...
Ok so I was able to fix the issue. The problem was the memory was being cached (or more accurately partially cached for some reason). In qsys I added an additional peripheral region for the qspi region and this allowed me to properly read and write to the NOR Flash as expected using the code in my original post.
As a more permanent fix, I will be changing my niosv_g processor to a niosv_m processor, which does not allow data caching, as the ability to only create two peripheral regions is limiting.
