Forum Discussion
New ContributorAccessing qspi with a NIOS V application on a C10GX
Ok so I was able to fix the issue. The problem was the memory was being cached (or more accurately partially cached for some reason). In qsys I added an additional peripheral region for the qspi region and this allowed me to properly read and write to the NOR Flash as expected using the code in my original post.
As a more permanent fix, I will be changing my niosv_g processor to a niosv_m processor, which does not allow data caching, as the ability to only create two peripheral regions is limiting.
Regular ContributorHi
Could you try :
retval = alt_qspi_controller2_write_block(fd, pageSize,0 , retdata, pageSize);
Swapping the block_offset and the data_offset?
The block offset is the offset in the flash and the data offset is the array offset.
The definition of the write block is as follow:
int alt_qspi_controller2_write_block(alt_flash_dev *flash_info, int block_offset, int data_offset, const void *data, int length);
Regards
Jingyang, Teh
