Forum Discussion
Altera_Forum
Honored Contributor
14 years agoHy everyone ..
I am trying to experiment with this DMA things too. The result:
testing ssram & sdram : dma operation
content of ssram_0:before DMA operation
0: 0
1: 1
2: 2
3: 3
4: 4
5: 5
6: 6
7: 7
8: 8
9: 9
10: a
11: b
12: c
13: d
14: e
15: f
content of sdram_1:before DMA operation
0: 0
1: 0
2: 0
3: 0
4: 0
5: 0
6: 0
7: 0
8: 0
9: 0
10: 0
11: 0
12: 0
13: 0
14: 0
15: 0
I don'd get the result after that.. seems like it stuck on
while(!txrx_done);
or txrx_done never go to 1 ? Besides, "content of sdram_1:before DMA operation " is always changing. Sometimes it'll become :
0: 33
1: 33
2: 33
3: 33
4: 33
5: 33
6: 33
7: 33
8: 33
9: 33
10: 33
11: 33
12: 33
13: 33
14: 33
15: 33
Any reply will be appreciated Thank you:-P Yuyex:o