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Honored Contributor
Honored Contributorabout component made by user logic
hello, anyone encounter this problem that a component made by user logic can't run with nios system that has comprised ram and flash and so on? who can give me some suggesti...
Altera_ForumHonored Contributor
Honored ContributorThe architecture is as follows
i) Custom Logic I -> FIFO -> IUL (Read) - Nios - IUL (Write) -> FIFO -> Custom Logic II ii) A PLL provide a systme clk to such logic blocks respectively. They finished the information transmission thru FIFO. I have no idea that the above is enough?
