Altera_Forum
Honored Contributor
Honored Contributora strange problem about up3 project
when I use niosII IDE build a project, some error display like these:
<div class='quotetop'>QUOTE </div> --- Quote Start --- Kind Status Priority Description Resource In Folder Location Error *** [obj/alt_sys_init.o] Error 1 test_led Error *** [rebuild] Error 2 test_led Error *** [system_project] Error 2 test_led Error error: `SDRAM_TEST_COMPONENT_BASE' undeclared here (not in a function)[system_description/alt_sys_init.c] test_led line 79 Error error: `SDRAM_TEST_COMPONENT_NAME' undeclared here (not in a function)[system_description/alt_sys_init.c] test_led line 79 Error error: `SDRAM_TEST_COMPONENT_REGISTER_OFFSET' undeclared here (not in a function)[system_description/alt_sys_init.c] test_led line 79 Error error: (near initialization for `sdram_test_component.dev.base_addr')[system_description/alt_sys_init.c] test_led line 79 Error error: (near initialization for `sdram_test_component.dev.name')[system_description/alt_sys_init.c] test_led line 79 Error error: (near initialization for `sdram_test_component.dev')[system_description/alt_sys_init.c] test_led line 79 Error error: (near initialization for `sdram_test_component.register_base')[system_description/alt_sys_init.c] test_led line 79 Error error: initializer element is not constant[system_description/alt_sys_init.c] test_led line 79[/b] --- Quote End --- then I check the system.h file, there is some strange block: <div class='quotetop'>QUOTE </div> --- Quote Start --- #define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_NAME "/dev/sdram_test_component"# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_TYPE "altera_avalon_epcs_flash_controller"# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_IRQ# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_DATABITS 8# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_TARGETCLOCK 20# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_CLOCKUNITS "MHz"# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_CLOCKMULT 1000000# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_NUMSLAVES 1# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_ISMASTER 1# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_CLOCKPOLARITY 0# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_CLOCKPHASE 0# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_LSBFIRST 0# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_EXTRADELAY 1# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_TARGETSSDELAY 100# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_DELAYUNITS "us"# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_DELAYMULT "1.e-06"# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_PREFIX "epcs_"# define SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT_REGISTER_OFFSET 0x200[/b] --- Quote End --- what is SDRAM_TEST_COMPONENT_EPCS_CONTROL_PORT? If I compile .ptf again, it disappear maybe. But will appear next time. who can tell me what's the problem of my design?
