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Honored Contributor
Honored ContributorA shared custom Instruction between Nios II processors
Hello everybody, I want to Implement a shared Custom Instruction Hardware(a shared Accelerator) which connects directly to the Nios II arithmetic logic unit (ALU). In fact, I want to know ho...
Altera_ForumHonored Contributor
Honored ContributorHi,
Thank you for your reply. But, could you please explain more what you mean by " alternatively you could simply add a second CI Slave port to your existing IP block and perform the arbitration internally." You mean that i can made simply an accelerator as custom IP and i make it a dual port peripheral. Or you mean for a custom instruction, i can associate a vhdl block with two slave ports and then the vhdl block of this custom instruction could be accessed by two CPU?
