A problem in SOPC

I want to build a new component in SOPC,an error occurs when I add HDL files:

Error: command "quartus_map --generate_hdl_interface=E:/de2proj/ip_vga/ce_temp_directory/vga_output.v ce_temp_directory/ce_temp_quartus_project" returned 3
Error (10000): Verilog HDL or VHDL error: error generating xml interface file for HDL file %s, interface file not generated.E:/de2proj/ip_vga/ce_temp_directory/vga_output.v
Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warnings
    Error: Processing ended: Sat Jul 15 00:59:48 2006
    Error: Elapsed time: 00:00:02
Error: E:/de2proj/ip_vga/ce_temp_directory/vga_output.v.xml does not exist

How solves this problem,I need your helps.

Is this problem related with the license for Quartus II?

Thanks! http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif