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Altera_Forum
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21 years ago

8 bit dynamic alignment for SPI device?

Hello! I've designed controller for NVRAM memory with SPI interface. I've create component as memory slave device with 8 bit data bus (I don't want to use this as register slav...
Altera_Forum's avatar
Altera_Forum
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21 years ago

Hi Camelot,

I think this behaviour is caused by the "memory slave" setting. Infact your peripheral is 8 bit wide and, in order to read a 32 bit word, the Avalon bus has to do 4 reading from your peripheral.

How many registers has your peripheral and what's address span?