Forum Discussion
Altera_Forum
Honored Contributor
20 years ago256MByte boundary not supported ?
Has anyone created a nios2 system with more than 256MByte instruction address range ? If for example a sdram controller for 256MByte is part of the instruction master of a nios2 cpu then the so...
Altera_Forum
Honored Contributor
20 years agoThanks for that explanaition. i thought that it had to do with some addressing limitations but i must have overseen this when reading the altera online documents this morning again.
as this is a limitation by the opcodes i guess that this will be forever. i thought of using uclinux and spent a lot of sdram but i cannot garantee that the memory will only be used for data. and as i have to attach an epcs controler as well as the jtag stuff the instruction space for the system is less than 256mbyte. as i can not tell the sdram controller to implement 3 chip selects of 64mb (to have 192mb) i can only choose betwen 128 and 256mbyte but that is not implementable with epcs so the design is limited to 128mbyte sdram (for instruction and data) with one sdram controller that is a lot of memory but i thought of what would be possible in the future. 640k was enough for DOS and 640MByte is not much nowadays for quartus :-) again thanks for your comments. regards michael schmitt