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Altera_Forum
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13 years ago

2 read pulses after an IORD_16DIRECT

we are implementing the isp1763A on our custom board. when we do an IORD_16DIRECT at address 0x00 the system generate 2 Read pulses at address 0x00 and 0x02 ISP1763 is configured in SRAM 16bit ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Avalon Tristate bridge

Bus_Type = "avalon_tristate";

Address_Group = "1";

Has_Clock = "0";

Address_Width = "8";

Address_Alignment = "dynamic";

Data_Width = "32";

Has_Base_Address = "1";

Has_IRQ = "0";

Setup_Time = "40ns";

Hold_Time = "10ns";

Read_Wait_States = "60ns";

Write_Wait_States = "40ns";

Read_Latency = "0";