1S10 dev. board and MAX Freq.

I'm barely reaching an Fmax of 100MHz with the 1S10 (ES) NIOS development board using the "s" core, so you might want to target the "f" core if that's an option. With the 'f" core you can probably reach 125MHz easy if your surrounding logic doesn't not drag down the NIOS core.

The 's' core is constricted to around 100MHz on the paths through the ALU (hardware multiply, shifting, etc....)

Is there some Quartus optimization that I should try since my target is 100MHz, and I was able to make the "s" model keep up to the full one (I want to save 400LEs)

Cheers