Forum Discussion
AHorn4
New Contributor
7 years agoHi,
I can run the examples shown on:
https://fpgawiki.intel.com/wiki/Cyclone_V_Transceiver_PHY_Basic_Design_Examples
They run without a problem in Modelsim 10.1d which makes me think it is Quartus 13.0sp1 that is the problem.. Or I am not designing the Native PHY correctly.
What is the simplest method of getting parallel data from the FPGA to the high speed serializers through the HSMC connectors? I don't need any fancy reset or reconfiguration control - just need to serialize 40-bit parallel data (using the double width setting) at a very high speed. The 40-bit vectors are updated @20MHz (for example) and I need to serialize it @800MHz (40x 20MHz).
Cheers,
Alex