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There is no os.
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Ok.
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I just want to use the board with pci compiler as pci master, and another board connected to it as slave. Under Nios II IDE, how can i access the configuration space of master device or slave device?
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Is the PCI core an Avalon component? If it is, then in your SOPC or Qsys System, there should be an Avalon-MM slave block for the configuration space, another for PCI accesses, and there may be some other registers so that the PCI accesses will use I/O or memory commands.
If the PCI core is not an Avalon component, then the same sorts of register interfaces will likely exist, its just that you'll have to create Avalon-MM interfaces, so that your SOPC system containing the NIOS core can access those registers.
I would recommend starting with a testbench of just the PCI core alone, and figure out how to get a couple of instances talking to each other, i.e., configure one as the master and one as the target.
Cheers,
Dave
Honored Contributor
