lv0001New Contributor6 years agoWhen i try to simulate a PCIE example design the simulation time is very large. How can it be optimized to reduce the simulation time
KennyT_alteraSuper Contributor6 years agoYou can refer to https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/model-sim.html, you may have to contact mentor for the purchase
Recent DiscussionsWhat if I did wrong recharge in Jio?SolvedCan we get a refund for a wrong recharge in Jio?SolvedHow do I complain about my RBL credit card?SolvedConstraints not being picked for DCFIFOF-Tile xcvr placement on DK-DEV-AGF023FA