Forum Discussion
Hi Bryan,
Thanks for your update and explanation. I understand that you have a SDI RX and another SDI TX. You are feeding SD SDI video from external generator and when you observe with signaltap, the SDI RX seems to be working fine.
As I read through you description, just wonder if you are trying to perform a data re-transmit where you take the received data from RX, loopback to TX and transmit out to a monitor? If yes, as I understand it, generally you will need some FIFO in between to ensure correct data passing from RX to TX. Also, generally a VCXO is required to clean up the recovered clock before feeding into the TX as XCVR refclk.
You may try to generate an example design for Triple-Rate SDI II IP and then refer to the loopback FIFO in the example to see if it is helpful. You may also refer to the clocking connection for re-transmit application. For further details on the example design, you can refer to the "Design Example for Arria V, Cyclone V, and Stratix V Devices" section in the SDI II IP user guide.
Please let me know if there is any concern. Thank you.