We are having issue getting data out of the CIC core during simulation.

We have built up a QSYS design with our own core feeding into a CIC core, feeding into a FIR core. In our simulation we can see signals and data going into the core, and see the appropriate handshake signals coming out of the core's streaming interface, but the data shows up as unknown!​ Since it is built with IP, we cannot dive into the core to see where things have gone wrong.