Forum Discussion
Altera_Forum
Honored Contributor
13 years agoI have a doubt.
Is the frame buffer itself to control the data flow if i have a pattern generator as an input data and a clocked video output as an output data? (both from the VIP). or Is it necessary to use the Nios II for this case? I tested the HPC II ddr2 controller out of QSys and is working, but when I integrate all these cores in Qsys I dont see anything. Thank you, Juan