Forum Discussion
Altera_Forum
Honored Contributor
16 years agoThe behavior of the VIP cores is often to pass all control packets through. So for example, the deinterlacer will pass the original interlaced control packet followed by the new control packet. The scaler likely does the same thing. So it's passing the control packet that it received from upstream, then it's sending it's own control packet for the frame that it has just scaled. That is why you see two.
You're image is slanting down and to the left. Which indicates that you are dropping pixels. This points to overflowing the input FIFO. You ought to be able to probe with signaltap for this (or read the status register). Look at the image. Would you say your losing about 7 pixels per line? Doesn't the CVI have an overflow output that you can observe? If you are overflowing the input FIFO, then yes the solution is to increase the processing of the video. Specifically, you need to get it out of the CVI, through the scaler, and into the frame buffer faster. It could very well be that adding the runtime control to the scaler pushed you over the edge because now the scaler has to decode the incoming control packets. Jake