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dicas3d's avatar
dicas3d
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3 years ago

Verilog .v and.vp on zip file to Qsys

I got a model in Verilog from my development board's SDRAM controller controller manufacturer. The model comes in a file. zip that contains a file. .vp and a .vp file. How to convert to an Qsys compon...
Memory
SyafieqS's avatar
SyafieqS
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3 years ago

Let me know if there is any update


  • dicas3d's avatar
    dicas3d
    Icon for New Contributor rankNew Contributor
    3 years ago
    This tutorial is only applicable in the pro version, but I managed to get an SDRAM controller working on my system and version ported from an old version.