Forum Discussion
we should have fix the website, have you tried?
Hi,
The following is the picture of resource of the example project i have created and it's simulation results. You can see mine for the same configuration consuming only 2k ALMs and no DSPs.
Even the simulation in Modelsim using that also not getting proper results. In my main project also around same 2k resources it's consuming and the result there i am seeing in signal tap and even that project result also from source output all are zeros except the dc bin with some amplitude. I am not getting to know where the problem is happening with this fpga part and why no results producing properly.
To see the simulation in the mentor folder run fftblock.do in modelsim so that you can see the result too. But , whole problem is same that now it's is confirmed for me that my fft ip somehow inside signals getting trimmed whether it is 16.1 or 18.1 even for a sample code and not consuming any dsp and not giving any result.
Please help me in this aspect what is the problem of my project or my settings. By the way I am doing 2048 fft don't get confused with 4096 name and example project you gave also changed to 2048 fft and the resource consumption table shown in last picture.
Hi, I tried this 18.1 folder keeping in 16.1 installation as you suggested.
The following is the resource consumption table after synthesis of the example project attached by you previously. You can see FFT with DSP consumes around 4k ALMS and 18 DSPs