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VenkateshSathar's avatar
VenkateshSathar
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

using DSPs in the FPGA as ALMs for standard FFT IP

Hi, We are using standard FPGA FFT IP for our design given by intel. we want to use many FFT IPs parallely for that the problem that we are seeing is resources for ALMs required is not suffiecient ...
KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
6 years ago

Thanks, I will recreate this from scratch for Q16.1 tomorrow. Any reason that you cannot upgrade to Q18.1? As this might be an old Quartus bugs.

  • VenkateshSathar's avatar
    VenkateshSathar
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Our entire project provided by our vendor is with 16.1 only , over that we are developing some algorithms. Looks like vendor right now will not upgarde project to 18.1 with his custom made DSP Builder related IPs etc and give us.So, we are also proceeding with 16.1