Forum Discussion
Remember the attribute that I suggest earlier? Here is the format of it:
It is called the Verilog multstyle attribute to inform Quartus that you want to use logic based multipliers. To do this, add the following line directly above the module definition:
(* multstyle = "logic" *)
For example, you might have:
(* multstyle = "logic" *) module someMultipler ( ...
This will tell Quartus to use logic for any multiplier in this module.
You can do the same to request DSP blocks as well, using
(* multstyle = "dsp" *)
With this you can selectively choose which module to use logic and choose which you want to use dsp.
yeah. Understood. but since it is a standard fft ip and i added that in a bdf. in which verilog file i should add this attribute?
i see in online you can apply this attribute to the verilog code. but you know when we deal with schematic view and bdf and standard ips where is the scope for verilog file to add this ?
still i tried to add this at the verilog file top module file generated by qsys of the ip. No DSPs are consumed after this trying also. refered the attribute syntax from the following link https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/hdl/vhdl/vhdl_file_dir_multstyle.htm