using DSPs in the FPGA as ALMs for standard FFT IP

Remember the attribute that I suggest earlier? Here is the format of it:

It is called the Verilog multstyle attribute to inform Quartus that you want to use logic based multipliers. To do this, add the following line directly above the module definition:

(* multstyle = "logic" *)

For example, you might have:

(* multstyle = "logic" *) module someMultipler ( ...

This will tell Quartus to use logic for any multiplier in this module.

You can do the same to request DSP blocks as well, using

(* multstyle = "dsp" *)

With this you can selectively choose which module to use logic and choose which you want to use dsp.