Forum Discussion
Altera_Forum
Honored Contributor
13 years agoFor this design, I have a last question about the data cache.
Let me describe this question first. When I use NiosII/e (without data cache), my SGDMA program works fine. The program copies a control packet and a video data packet to an on-chip memory by using SGDMA and descriptor chain. I can see the correct data with the following code in NiosII console.
printf("ctrl_buf:\n");
printf("%08x %08x %08x\n", IORD(ctrl_buf, 0), IORD(ctrl_buf, 1), IORD(ctrl_buf, 2));
printf("video_buf:\n");
for(int n = 0; n < 769; n++)
{
if(n % 10 == 0) printf("", n);
printf("%08x ", IORD(video_buf, n));
if(n % 10 == 9)
{
printf("\n");
}
}
This is how I declare variables for ctrl_buf and video_buf
alt_u32 ctrl_buf = {0};
alt_u32 video_buf = {0};
However, when I use NiosII/f (with data cache) to execute the same program, what I see in NiosII console about the data is partly different. (SGDMA transfers the same byte number of data no matter NiosII/f or NiosII/e is used. So I believe the SGDMA transfer still works well) I've already used the marco IORD to bypass the data cache so I don't know how this happens.