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vsath's avatar
vsath
Icon for New Contributor rankNew Contributor
6 years ago

usage of SGDMA IP for data transfer to and from DDR3

Hi, I want to develop a system with NIOS II Processor on Arria V of one of our custom boards for DDR3 memory transfers. where as there will be a sensor which will be giving around 128 bit data per...
VenkateshSathar's avatar
VenkateshSathar
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Hi,

Got the example for arria 10 with NIOS using MSGDMA from the following link

https://fpgawiki.intel.com/wiki/MSGDMA_design_example#Steps_to_Run_Design_Example

and I have another example for cyclone V for DDR3 test using NIOS processor SoCkit_v.2.0.1_SystemCD.zip

I tried to integrate both.

Things which are working are

  1. NIOS II <---> DDR3 communciton
  2. MSGDMA <---> OnchipMemory
  3. NIOS II <---> OnchipMemory

Things which are not working are

  1. MSGDMA <---> DDR3 communication

Technically I don't see any problem in my code or project and connections realted but why DDR3 communication not working not getting because even MSGDMA registers also in NIOS Debug for both case MSGDMA to onchipmemory and MSGDMA to DDR3 are responding in the same way. But, don't know why writing to DDR3 using MSGDMA is not working. Any idea that you can tell for this...?

Zip file of the project also has been attached . You can review it once and help us.

The FPGA kit we are using for this test is available in the following link for your reference.

https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=205&No=816&PartNo=2

You can review our design once and help us in correcting it if there is any mistake or error?

Awaiting for your reply.

Hope we will get the help soon.