GDagi1
Occasional Contributor
5 years agoUnable to enable RX_TNA and TX_ENA bits (Triple-Speed Ethernet IP)
Hi all,
I'm working with the Triple-Speed Ethernet IP and currently am in the process of setting up the MAC register space. I am following the order found in 5.3.1 of the Triple-Speed Ethernet User...
- 5 years ago
I believe to have solved the issue. Through prior experience with Intel IP, I had thought to implement a counter to remain in the writing state, as it may take some time for this update to complete. I now see these bits go high. I could not find this explicitly stated within the Triple Speed IP User Guide.