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Altera_Forum
Honored Contributor
14 years agoTSE MAC and National DP83848I
Hi, guys:
I use the TSE MAC and National DP83848I in my design, according to project template "simple server socket". Running as hardware on my board, and get the following results: Copyright 1996-2008 by InterNiche Technologies. All rights reserved. prep_tse_mac 0 Your Ethernet MAC address is 00:07:ed:ff:ff:ff Static IP Address is 192.168.1.234 prepped 1 interface, initializing... [tse_mac_init] INFO : TSE MAC 0 found at address 0x0800a000 error : mac group[0] - no phy connected!ERROR : PHY[0.0] - No PHY connected! Speed = 100, Duplex = Full OK, x=0, CMD_CONFIG=0x01000000 MAC post-initialization: CMD_CONFIG=0x05000203 [tse_sgdma_read_init] RX descriptor chain desc (1 depth) created mctest init called IP address of et1 : 192.168.1.234 Created "Inet main" task (Prio: 2) Created "clock tick" task (Prio: 3) Nios II Simple Socket Server starting up. Created "monitor_phy" task (Prio: 9) Created "Nios II Simple Socket Server" task (Prio: 10) [SSS_task] Nios II Simple Socket Server listening on port 30 I'm confused and how to resolve it ? Thank you for your attention and any advice is appreciated.
6 Replies
- Altera_Forum
Honored Contributor
This means that the TSE core didn't get a reply from the PHY chip on the MDIO lines. I would start by checking that the MDIO connections are done properly (both in the FPGA outside the SOPC/QSys component and on the board outside the FPGA).
- Altera_Forum
Honored Contributor
Did you check the MDC signal, too?
Can you acquire a trace including both of them, MDIO + MDC ? This would show if PHY is responding anything. - Altera_Forum
Honored Contributor
--- Quote Start --- Did you check the MDC signal, too? Can you acquire a trace including both of them, MDIO + MDC ? This would show if PHY is responding anything. --- Quote End --- Thanks, frequency of MDC is about 3.75MHz. I will get the trace next workday. - Altera_Forum
Honored Contributor
The usb port on my oscillograph doesn't work now , and I can't show you the trace of MDIO and MDC.
From the signals, it seems that the MDIO signal is not right, responding nothing. The MDIO signal holds high level after showing the PHY address and register address to PHY. Now , what should I do to check the PHY ? PS: It works now, LOOOOOOL:-P - Altera_Forum
Honored Contributor
Be sure to record the whole session, as the driver will test all the 32 possible PHY addresses, and abiously the PHY will only answer to one of them.
- Altera_Forum
Honored Contributor
can it do sockets