SKon1Occasional Contributor5 years agoTSE - PCS only internal loopback problem Hello, I'm using the TSE core in a PCS only configuration on an Arria V FPGA. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_ethernet.pdf Data is being sent from my...Show Moresignal_tap.png86 KB
SengKok_L_IntelRegular Contributor5 years agoThis is the known behavior as per the errata. Thanks. Regards -SK
Recent DiscussionsSerialLite II license for Arria10 FPGAAgilex3/5 GTS Hard Ethernet IP 10G example design pin loc and io std wantedCORDIC ATan2 Failed to GenerateConfigurable transceiver enableSolvedWhere is High Speed Transceiver Demo Design in FPGA Wiki ?