Forum Discussion
SengKok_L_Intel
Regular Contributor
6 years agoHi.
From your simulation, did you initialize the TSE IP register? Please refer to chapter 5.3 in the following link. Besides, I would suggest you generate the design example to run the simulation, you can refer to chapter 9 for the simulation testbench:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_ethernet.pdf
Regards -SK
GDagi
New Contributor
6 years agoHello & thank you for your response Seng,
Chapter 5.3 states "When using the Triple-Speed Ethernet IP core with an external interface, you must understand the requirements and initialize the registers."
- Because I am doing internal testing and simulation, do I still need to initialize the registers?
- If so, would that be simply adding these lines into the testbench?
- How are these lines formatted? Example: "Wait Command_config Register = 0x00802220" I don't believe this is a valid assignment in Verilog.
Thank you