Forum Discussion
Altera_Forum
Honored Contributor
9 years agoYou must ensure that both the TSE and the PHY are in 100 MBit/s mode. There is a register to set in the TSE (and/or an external signal, depending on your project) to force the 100 MBit/s mode, and also some MDIO registers to set in the PHY chip to prevent Gigabit/s autonegotiation. Check the datasheet. I'm not familiar with that PHY or that board, but in addition you may have to switch to an MII interface instead of RGMII.