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Altera_Forum
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17 years ago

Timing Violation for legacy DDR2 Controller

Hi There, I generated DDR2 SDRAM controller using mega wizard for memory frequency of 125 MHz and data width of 8. Timing analysis is failing because of violation in read data synchronization p...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Hi,

I have several examples of different systems in this directory:

C:\altera\kits\StratixII_GX_DSP_Kit-v6.0.1

Inside this folder shold be another folder named "examples", here you could find a system that use ddr2 sdram controller.

If there isn't tell me what sdram controller you use!

I use this:

"DDR2 SDRAM Controller MegaCore Function - Altera Corporation"

If is the same I give you my settings.

Bye

Luca