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Altera_Forum
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17 years ago

Timing Violation for legacy DDR2 Controller

Hi There, I generated DDR2 SDRAM controller using mega wizard for memory frequency of 125 MHz and data width of 8. Timing analysis is failing because of violation in read data synchronization p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi,

in the wizard there is a section called "constraint"! Do you edit this section?

In your installation directory "C:\Altera.." is there an example where the ddr2 sdram controller is used? You can copy the setting from the example! I fixed my problem in this way!

Bye