Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

timing questions -false path for the experts

Hi, I have a design that has value in it that define the code behavior, let call them: config_reg table_of_vaule 1. because of the nature of those things, they are deep in the design. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

I read your first post and re-read it but you are not explaining the clocking scheme around (a).

I understand you are clocking the register conf_reg with 25MHz.

But what about register (a)? is it on 25MHz or 100MHz?

From your statemet "if a=1 and conf_reg(0)" I know it is on clock 100MHz thereafter