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Altera_Forum
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8 years ago

The output signal din_ready from the model cpr

The model is from the image and video processing IP. When I run the simulation, it display as follows for din_ready. https://alteraforum.com/forum/attachment.php?attachmentid=14110&stc=1 ...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi Jiangsuren,

The din_ready signal is a backpressure signal, it is normal to goes low whenever the IP is unable to receive more data. But it is abnormal if this signal keep de-asserted. If this is the case, you may also check whether the dout_signal also de-asserted because the problem may cause by downstream component.

Best Regards,

Terence

(This message was posted on behalf of Intel Corporation)