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Occasional Contributor

2 years ago

Terasic D8M-FMC Camera Demo written in Verilog But Have No translator for VHDL?

I recently bought a D8M-FMC Camera Module for a Terasic Dev Kit to expand it's capabilities. However all the RTL Demo is written in Verilog. I wrote support at Terasic and they only know how to code ...

Video

ShengN_altera

Super Contributor

2 years ago

Hi,

Actually not necessary to convert verilog to VHDL. You can straight away instantiate the verilog module in VHDL as mixed language.

Thanks,

Best Regards,

Sheng

Forum Discussion

Terasic D8M-FMC Camera Demo written in Verilog But Have No translator for VHDL?

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