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anat's avatar
anat
Icon for New Contributor rankNew Contributor
1 year ago
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Stratix10 PHY Lite IP - Output clocks

Hi Team,

Are the additional output clocks (outclk1, outclk2, outclk3, outclk4) generated by PHY Lite IP, synchronous to each other?

Memory
  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    1 year ago

    Hi


    "Are the additional output clocks (outclk1, outclk2, outclk3, outclk4) generated by PHY Lite IP, synchronous to each other?"

    • Yes


    Regards,

    Adzim


1 Reply

  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    Icon for Regular Contributor rankRegular Contributor
    1 year ago

    Hi


    "Are the additional output clocks (outclk1, outclk2, outclk3, outclk4) generated by PHY Lite IP, synchronous to each other?"

    • Yes


    Regards,

    Adzim